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Multilayer Build-up

 

Revision 3, July 2005

 

A multilayer printed circuit board is built up using copper clad laminates, prepregs and copper foil. Unless the customer has specified otherwise, Chemitalic will use the so-called foil lamination technique. The outer layer copper is copper foil, which is bonded together with copper clad laminates in the lamination process using prepregs as the bonding material. This, in combination with a symmetrical build-up, will minimize the risk of bow and twist on the finished circuit board.

 

 

Minimizing warp

 

A well-made multilayer circuit board is flat and complies with the thickness tolerance specifications.  The circuit board manufacturer must of course be able to comply with these requirements, but a good design from the beginning will minimize the risk of deviations. Warp is the cylindrical distortion of a circuit board; it can occur in both axes directions. The most frequent cause of warp is a dissimilar cooling of the circuit board during the production process and/or in the solder process; this type of warp is called extrinsic warp.

 

The other type of warp is the intrinsic warp, which the constructor can influence by choosing a suitable circuit board build-up. In order to achieve the best result, the build-up must be symmetrical around the centre plane of the circuit board. Asymmetrical build-ups cause intrinsic warp due to differences in the CTE (Coefficient of Thermal Expansion), which cause internal stress when heating and cooling the circuit board. 

 

FIG 1 shows two types of build-up, the left is a symmetrical build-up in both the distribution of signal/power planes and in the core thickness, hence the risk of intrinsic warp is reduced. The build-up to the right is asymmetrical, therefore, the risk of intrinsic warp is very high.

 

 

On the outer layers, it is recommendable to try to obtain the same ratio between the copper areas and the clean etched laminate on both sides of the circuit board, this could be achieved using so-called plating thieves, e.g. dummy copper areas for levelling. Also symmetrical inner layers regarding copper distribution improves the manufactureability.

 

 

Thickness tolerance

 

When the number of layers in a multilayer circuit board is increased, the thickness tolerance has got be increased too. It is therefore recommendable to specify a tolerance of ±10 percent. Always state where to perform the measurement; PERFAG describes the measurement as follows:

 

1: As measured by the PCB manufacturer: Just after lamination, i.e. including the copper foil of the outer layers.

 

2: As measured by the customer: If possible over edge connector terminals, otherwise over clean etched laminate, adding the nominal thickness of the outer layers' copper foils and subtracting the nominal thickness of any masks.

 

Note that the thinnest possible copper foil for both inner layers and outer layers, with due consideration to the current carrying capability, is an optimisation with respect to both manufacturability and the environmental impact. See also the materials section.

 

 

Standard Multilayer Constructions

 

Below is a description of four of Chemitalic's standard multilayer constructions. Unless otherwise specified, our sales department will choose one of these constructions. In case you should have special requirements to e.g. insulation spacing, copper thickness etc., please contact our sales department.

The four standard constructions are:

 

 

 

Table 1: 4 layers with 18/18 micron outer and inner layers

 

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